The Summer School is possible thanks to the several speakers and organizers who donate their time to make this event a success. The list of speakers is currently being updated.

Alberto Sangiovanni-Vincentelli – University of California, Berkeley (USA)
Wednesday 27th, 9:00 – 10:30 – “Let’s get Physical: Adding Physical Dimensions to Cyber Systems”
Thursday 28th, 9:00 – 10:30 – “A Contract-Based Design Methodology for Cyber Physical Systems”
He holds the Edgar L. and Harold H. Buttner Chair of Electrical Engineering and Computer Sciences at the University of California at Berkeley. In 1980-1981, he was a Visiting Scientist at the Mathematical Sciences Department of the IBM T.J. Watson Research Center. In 1987, he was Visiting Professor at MIT. He is an author of over 800 papers, 17 books and 2 patents in the area of design tools and methodologies, large scale systems, embedded systems, hybrid systems and innovation. He was a co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation and the founder and Scientific Director of the PARADES Research Center in Rome. He was a member of the HP Strategic Technology Advisory Board (2005-2007), a member of the Science and Technology Advisory Board of General Motors (2003-2013), and is a member of the Technology Advisory Council of United Technologies Corporation (2005-present). He is a member of the Advisory Board of Innogest, Xseed and a member of the Investment Committee of Atlante Ventures and Fondo Next. Since January 2013, he is the President of the Strategic Committee of the Italian Strategic Fund. He is member of the Scientific Council of the Italian National Science Foundation (CNR). Since February 2010, he has been a member of the Executive Committee of the Italian Institute of Technology. Since July 2012, he has been named Chairperson of the Comitato Nazionale Garanti per la Ricerca.

Alessandra Bagnato – Softeam, Paris (France)
Monday 25th, 15:05 – 16:20 – “Cyber-physical systems Industrial applications in the CPSwarm Project”
She is a research scientist and project manager within the Softeam R&D Department based in Paris. She holds a Ph.D. degree in Computer Science from TELECOM SudParis and Université Evry Val d’Essonne, France and a MSc in Computer Science from the University of Genoa, Italy. She has been at TXT Corporate Research Division headquartered in Milan, Italy from 1999 till September 2012 as Project Coordinator, Project Manager and/or Technical Leader in several European research projects related to embedded systems design, software/service development and security. Among them she was coordinator of project MADES, Model-based methods and tools for Avionics and surveillance embeddeDSystEmS (http://www.mades-project.org/). Since October 2012, she represents Softeam in the OMG SysML Revision Task Force, OMG Structured Metrics Metamodel 1.2 RTF and OMG UML Testing Profile Finalization Task Force. She is currently involved in the Integrated Tool Chain for Model-based Design of Cyber-Physical Systems of the H2020 project INTO-CPS project( http://into-cps.au.dk/), she is the coordinator of the ITEA 3 Project MEASURE (Measuring Software Engineering) and she is the project innovation manager in H2020 CPSwarm (http://www.cpswarm.eu/) where she is also leading the WP5 – CPSwarm Design Workbench.

Armando Tacchella – University of Genoa, Genoa (Italy)
Tuesday 26th, 11:00 – 12:30 – “Functional & NF Requirements Analysis”
He is Associate Professor of Information Systems at the Faculty of Engineering, at the University of Genoa. He obtained his Ph.D in Electrical and Computer Engineering from the University of Genoa in 2001 and his “Laurea” (M.Sc equivalent) in Computer Engineering in 1997. His teaching activities include graduate courses in AI, formal languages, compilers, and machine learning as well as undergraduate courses in design and analysis of algorithms. His research interest are mainly in the field of AI, with a focus on systems and techniques for automated reasoning and machine learning, and applications to modeling, verification and monitoring of cyber-physical systems. His recent publications focus on improving the dependability of complex control architectures using formal methods, from the design stage till the operational stage of the system. He has published more than forty papers in international conferences and journals including AAAI, IJCAI, CAV, IJCAR, JAI, JAIR, IEEE-TCAD. In 2007 he was awarded by the Italian Association of Artificial Intelligence (AI*IA) the prize “Marco Somalvico” for the best young Italian researcher in AI.

Christian Pilato – Università della Svizzera italiana, Lugano (Switzerland)
Wednesday 27th, 13:30 – 15:00 – “From high level specification down to hardware”
He is a postdoctoral researcher at the ALaRI institute of Università della Svizzera italiana (USI). Dr. Pilato received the M.Sc. degree in Computer Engineering (2007) and the Ph.D. degree in Information Technology (2011), both from Politecnico di Milano. He was research assistant at Politecnico di Milano until 2013 and postdoctoral research scientist at Columbia University until 2016. Dr. Pilato has been visiting researcher at NanGate, Chalmers University of Technology, and Delft University of Technology. Dr. Pilato’s research interests focus on system-on-chip architectures, hardware accelerators, and high-performance computing. In particular, he developed solutions and CAD tools for the optimization of memory accesses during the high-level synthesis of hardware accelerators to process massive data sets with energy-efficient high performance. He has actively participated to several projects sponsored by European Union (hArtes, Synaptic, FASTER) and a research center (C-FAR) supported by Semiconductor Research Corporation and DARPA.

Danilo Pau – STMicroelectronics, Agrate Brianza (Italy)
Thursday 28th, 17:20 – 18:50 – “The (Smart) Cyber-Physical Revolution: From Theory to Practice”
He is Senior Principal Engineer, Senior Member of Technical Staff at Advanced System Technology, STMicroelectronics, Agrate Brianza Italy. His current research interests are focused on Embedded Intelligence for IoT sensors, deep machine learning applied to heterogeneous sensors, human activity classification for embedded systems and ultra low power intelligent sensors. Since 1991 as Internship Engineer at STMicroelectronics, he acquired deep knowledge on Video coding, 2/3D Graphics for Embedded Systems and Computer Vision on which leaded breakthrough technical activities. He has tutored and advised many undergraduate and graduate students(on computer science and electronic engineering) and some PhD’s students. He coordinated several research projects with the most important Italian universities. He served for 3 years as 1st Chairman of the Technical Staff Community in STMicroelectronics and acted as co-chair of ISO/IEC MPEG CDVS and started CDVA standardization initiative as well as contributor to Khronos OpenGL-ES and OpenVG working groups since their conception. He is IEEE SM’07, M’96 and Industry Ambassador of the IEEE Italian Chapter, and acting as member of IEEE Industry relations group since 2016. Since 2017 is vice-chair Task Force on “Intelligent Cyber-Physical Systems” IEEE CIS. He has represented at technical level STMicroelectronics in several EU and Regional funded projects.

Eduardo de la Torre – Universidad Politécnica de Madrid, Madrid (Spain)
Tuesday 26th, 15:20 – 16:50 – “Self-adaptation of Cyber Physical Systems: Flexible HW/SW computing”
He is Associate Professor of Electronics since 2002, and obtained his MSC and PhD degrees in Electrical and Electronic Engineering from Universidad Politécnica de Madrid in 1989 and 2000, respectively. His main expertise is in FPGA-based embedded systems design and, in particular, on partial and dynamic reconfiguration of digital systems and reconfigurable Hardware acceleration. He has been working more than 25 years on digital systems design, among which more than 20 have been around FPGAs, mostly in industrial applications. He has more than 50 papers on reconfigurable systems in the last five years, and around 200 papers overall. He has been General Chair of the DASIP (2014) and ReCoSoC (2017) Conferences, as well as Program Co-Chair of ReCoSoC (2015), ReConFig (2012 and 2013), DASIP (2013), DCIS (2014) and SPIE VLSI Circuits & Systems (2009 and 2011). He is Program Committee member of Conferences such as FPL, ReCoSoC, RAW, WRC, ISVLSI, or SIES. He is also reviewer of numerous Conferences and Journals such as IEEE Transactions on Computers, IEEE Transactions on Industrial Informatics, IEEE Transactions on Industrial Electronics, or Sensor Magazine, Elsevier MICPRO. Currently he is involved in two European funded Projects, Enable-S3 (ECSEL JU) and Cerbero (H2020-ICT) as group leader, as well as a National funded project. All these three projects are on the topic of embedded reconfigurable CPSs, from which the ARTICo3 architecture is being enhanced and refined.

Francesca Palumbo – University of Sassari, Sassari (Italy)
Monday 25th, 9:00 – 10:30 – “Intro CPS + CERBERO project”
Wednesday 27th, 13:30 – 15:00 – “From high-level specification down to hardware”
She is currently an assistant professor at the University of Sassari, within the Information Engineering unit of the Department of Political Sciences, Communication Sciences and Information Engineering. She received her summa cum laude “Laurea Degree” in Electronic Engineering in 2005 at the University of Cagliari, then attended the Master Advanced in Embedded System Design in 2006 at the Advanced Learning and Research Institute of the University of Lugano before starting her Ph.D. in Electronic and Computer Engineering at the University of Cagliari. Her research focus is related to reconfigurable systems and to code generation tools and design automation strategies for advanced reconfigurable hardware architectures. For her studies in the fields of dataflow-based programming and hardware customization, she received two Best Paper Awards at the Conference on Design and Architectures for Signal and Image Processing, respectively in 2011 and in 2015, with the works entitled “The Multi-Dataflow Composer tool: A runtime reconfigurable HDL platform composer” and “MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation”. At the moment, Dr. Palumbo is the scientific coordinator of the CERBERO (ID: 732105) H2020 European Project on Smart Cyber Physical System Design, member of the steering committee of the ACM Conference on Computing Frontiers and of the editorial board of the Springer Journal of Signal Processing Systems.

Francesco Regazzoni – Università della Svizzera italiana, Lugano (Switzerland)
Thursday 26th, 15:20 – 16:50 – “Securing CPSs, new challenge or solved problem?”
He is a senior researcher. He obtained his PhD from USI in 2009, and his MSc in Computer Engineering from Politecnico di Milano. He is work package leader of the SAFECrypto project (H2020 ICT644729) and was actively involved in Swiss National Foundation, Nanotera framework and Swiss Innovation projects; he was invited speaker at the special session Design methodologies for securing cyber-physical systems” held at the E Week conference in 2015. He has published more than 50 of papers on design automation for physical security, countermeasure against physical attacks, and design of optimized hardware and software for security. He is serving or served as TPC member or reviewer for a number of major security and design automation conferences including CHES, HOST, and DATE, and CODES and ICCAD.

Hironori Kasahara – Waseda University, Tokyo (Japan)
Thursday 28th, 11:00 – 12:30 – “Software and Hardware for High Performance and Low Power Homogeneous and Heterogeneous Multicore Systems”
He is IEEE Computer Society (CS) 2018 President and 2017 President Elect and has served as a chair or member of 245 society and government committees, including the CS Board of Governors; Executive Committee; Planning Committee; chair of CS Multicore STC and CS Japan chapter; associate editor of IEEE Transactions on Computers; vice PC chair of the 1996 ENIAC 50th Anniversary International Conference on Supercomputing; general chair of LCPC; PC member of SC, PACT, and ASPLOS; board member of IEEE Tokyo section; and member of the Earth Simulator committee. He received a PhD in 1985 from Waseda University, Tokyo, joined its faculty in 1986, and has been a professor of computer science since 1997 and a director of the Advanced Multicore Research Institute since 2004. He was a visiting scholar at University of California, Berkeley, and the University of Illinois at Urbana–Champaign’s Center for Supercomputing R&D. Kasahara received the CS Golden Core Member Award, IEEE Fellow, IFAC World Congress Young Author Prize, IPSJ Fellow and Sakai Special Research Award, and the Japanese Minister’s Science and Technology Prize. He led Japanese national projects on parallelizing compilers and embedded multicores, and has presented 214 papers, 139 invited talks, and 28 patents. His research on multicore architectures and software has appeared in 560 newspaper and Web articles.

Jocelyn Sérot – Institut Pascal, Clermont-Ferrand (France)
Wednesday 27th, 11:00 – 12:30 – “High Level Synthesis methods”
Friday 29th, 09:20 – 10:30 – “HLS”
He is Professor at University Clermont-Auvergne, Clermont-Ferrand, France. He has worked for more than two decades in the fields of parallel programming, hardware and software architecture for computer vision and embedded system design. His main research interests are in the design and development of methodologies and domain specific programming languages for parallel and/or embedded applications. Prof. Sérot is the architect and developer of the CAPH dataflow-based high-level programming language for FPGA systems.

Joost Adriaanse – TNO, Eindhoven (Netherlands)
Monday 25th, 15:05 – 16:20 – “Smart Travelling Use Case”
He has been active in the research of service enabling technologies for about 26 years. He obtained his MSc degree in informatics (Artificial Intelligence & Robotics) at the University of Amsterdam in 1989. After graduation he performed research at the Free University of Amsterdam. He was then employed by Logica in the position of Programmer, Analyst and Consultant for a period of 8 years and after this was employed as Software Architect by KPN for a period of 10 years. Since 2008 he is working at TNO as Technical Consultant. His research activities are mainly in the field of Big Data and IoT. As a Technical Consultant he was involved in several national collaboration programmes and European projects (e.g. FP7 and Artemis).

Julio De Oliveira Filho – TNO, Eindhoven (Netherlands)
Tuesday 26th, 09:00 – 10:30 – “HW/SW Cyber-System Co-Design and Modelling”
Thursday 28th, 13:30 – 15:00 – “HW/SW Cyber-System modelling tools”
He has been active in the research of large and distributed embedded systems for about 14 years. He obtained his BSc/MSc degree in Computer Engineering in 2004 at the Federal University of Pernambuce, in Brazil. Subsequently he performed a PhD research at the University of Tuebingen, Germany, and received his degree in [2008]. He was employed by the University of Tuebingen in the position of research assistant for 6 years. Since 2011, he is working at TNO as research and innovation scientist. His research activities are mainly in the field of large, distributed and autonomous systems. As a project manager he was involved in several national collaboration programmes and in two European ARTEMIS projects. He is (co-)author of about 20 scientific papers and holds 2 international patents.

Karol Desnos – INSA de Rennes, Rennes (France)
Tuesday 26th, 09:00 – 10:30 – “HW/SW Cyber-System Co-Design and Modelling”
Thursday 28th, 13:30 – 15:00 – “HW/SW Cyber-System modelling tools”
He is an associate professor at the National Institute of Applied Science (INSA) of Rennes. He holds a joint appointement at the Institute of Electronics and Telecommunications of Rennes (IETR). He obtained his PhD in Signal and Image Processing from the INSA Rennes in 2014. This work was co-supervised by the Pr. Jean-François Nezan and Dr. Maxime Pelcat from the IETR, and by Dr. Slaheddine Aridhi from Texas Instruments, France. His research interests focus on dataflow models of computation and associated implementation techniques for the rapid prototyping of applications running on heterogeneous MPSoCs. In particular, his Ph.D. thesis focuses on the memory characterization and optimization of dataflow applications on MPSoCs. Since 2011, he contributes to the development of the PREESM open-source rapid prototyping. Karol Desnos co-authored more than 20 articles in peer-reviewed international journals and conferences. He has served as a member of the technical program committee of 3 international conferences (SiPS, DASIP, ASR-MOV). He has been actively involved in several projects including H2020 Project (CERBERO), French ANR Projects (COMPA, ARTEFACT), U.S. NSF Project (COMPACTS-SL-MODELS), and a young researcher project funded by the French research society “GdR ISIS” (MORDRED) which he leads. He took part in the creation of the MTAPI standard with the Multicore Association. In Fall 2012, Karol Desnos was a visiting researcher at the University of Maryland in the DSPCAD research group led by Pr. Shuvra Bhattacharyya. Since 2015, he has given invited lectures at INSA Euromediterranee (Fès, Morocco), at Universidad Politecnica de Madrid (Madrid, Spain), and at University of Rennes 1.

Michael Masin – IBM Research, Haifa (Israel)
Monday 25th, 9:00 – 10:30 – “Intro CPS + CERBERO project”
Tuesday 26th, 11:00 – 12:30 – “Cognitive CPS”
He is a Research Staff Member (RSM) in the Systems & IoT Engineering group at IBM Research – Haifa and has served as the technical lead and Principle Investigator for numerous projects, both with government and private customers. Michael’s research interests focus on the development of engineer-friendly tools and applications for deterministic and stochastic combinatorial multi-objective optimization. These include simulation and optimization-based engineering of complex systems and system of systems design, control, scheduling and logistics. Michael received his masters in mechanical engineering from the Moscow State University of Railway Transport, and then went on to get his masters and PhD in industrial engineering at the Technion – Israel Institute of Technology. He has published many papers in leading professional journals and conferences, filed 10 IBM patents, and continues to supervise graduate students at the Technion and Tel Aviv University.

Muhammad Shafique – TU Wien, Vienna (Austria)
Tuesday 26th, 13:30 – 15:00 – “Robust Heterogeneous Computing for CPS”
Wednesday 27th, 15:20 – 16:50 – “Low-Power Computing and Emerging Trends”
He is a Full Professor of Computer Architecture and Robust Energy-Efficient Technologies at the Institute of Computer Engineering at the Vienna University of Technology. He was a senior research group leader at Karlsruhe Institute of Technology, Germany for more than 5 years where he received his Ph.D. in Computer Science in 2011. Before, he was with Streaming Networks Pvt. Ltd. where he was involved in research and development of video coding algorithms and optimizations for VLIW-based Processors for several years. He was also a visiting research fellow at the School of Computer Science and Engineering, University of New South Wales (UNSW), Sydney, Australia in 2013 and at the Informatics Institute (INF), Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil in 2012. Prof Shafique research interests involve various topics from computer architecture to embedded systems. His research has a special focus on cross-layer design, management, modeling, and optimization of computing systems covering various layers of the hardware and software stacks (like micro-architecture, architecture, and system software). His group’s focus is to integrate the researched technologies and tools in application use cases from Cyber-Physical Systems (CPS), Internet-of-Things (IoT), and ICT for Development (ICT4D) domains. A part from numerous prestigious memberships in IEEE/ACM committee conferences (DAC, ICCAD, and DATE), he has served also as the Guest Editor for IEEE Design and Test Magazine and IEEE Transactions on Sustainable Computing.
He holds one US patent and has (co-)authored 4 Books, 3 Book Chapters, and 150+ papers in premier journals and conferences. He received the 2015 ACM/SIGDA Outstanding New Faculty Award, six gold medals in his educational career, and several best paper awards and nominations at prestigious conferences.

Paolo Meloni – University of Cagliari, Cagliari (Italy)
Tuesday 26th, 11:00 – 12:30 – “Cognitive CPS”
He is assistant professor at the Department of Electrical and Electronic Engineering (DIEE) in the University of Cagliari since 2012. From the same institution he received a Master degree in Electronic Engineering in October 2004, and a PhD in Electronic Engineering and Computer Science in October 2007, defending the thesis “Design and optimization techniques for VLSI network on chip architectures”. He works at the EOLAB-Microelectronics Lab since November 2004. His research activity is mainly focused on the development of advanced digital systems, with special emphasis on the application-driven design and programming of multi-core on-chip architectures and FPGAs. He has recently worked to the developement of NEURAghe, an FPGA-based accelerator for Convolutional Neural Networks. Within his research activity, he personally and directly cooperates on a daily bases with researchers from first-class academic and industrial actors in the field of Electronic Engineering. He is author of a significant track of international research papers, reviewer for international scientific journals and conferences, and tutor of many bachelor, master and PhD students’ thesis in Electronic Engineering and Computer Science. He is teaching the course of Embedded Systems at University of Cagliari and recently acted as part of the technical board and as work-package leader in the research projects ASAM (www.asam-project.org) and MADNESS (www.madnessproject.org) and as a principal investigator in the national project “ELoRA: Low-power Real-time processing of neural signals for prosthetic Aids”. He is currently participating to the CERBERO H2020 project.

Ugo della Croce – University of Sassari, Sassari (Italy)
Monday 25th, 13:30 – 14:45 – “How CPS applications in biomedicine came to reality. A journey through US funded schemes for stimulating research and industry”
He is Full professor at the University of Sassari, and Scientific Attaché, at the Embassy of Italy in the United States, Washington, DC. Since 2003 Associate Professor at the PM&R Department, University of Virginia (Charlottesville, Virginia). Since 2004 at the PM&R Department, Harvard Medical School, Boston. Main research activity: methods to improve the quality of quantitative human movement measurements, including video, dynamometry and inertial sensing. Author of more than 80 international publications. About 20 invited lectures and seminars. Winner of two international awards: Sidney Licht Award, American Congress of Rehabilitation Medicine (1997) and “Excellence in research writing award” American Journal of PM&R (1998). SIAMOC Council member (2001-2005). SIAMOC President (2013-2014). President of the 10th SIAMOC conference (Alghero, Sardinia 2009). “Biomechanics and Robotics” theme coordinator, IEEE EMBC (Boston, 2011). Organized and chaired the “1st Symposium on Human Movement Science”, Italian Embassy in the USA (Washington DC, 2005). President of the Scientific Committee of the XII International Symposium on the 3-D Analysis of Human Movement (Bologna, 2012). Member of conference scientific committees: ISEK Congress, (Vienna, 2002; Boston 2004), SIAMOC Conference (Pisa, 2005; Bellaria 2012; Pisa 2013 ). Associate Editor of the Journal of NeuroEngineering and Rehabilitation for which he edited a special issue (2006). Referee of numerous international scientific journals.