Hironori Kasahara
Multicores have been attracting much attention to improve performance and reduce power consumption of computing systems facing the end of Moore’s Law. To obtain high performance and low power on multicores, co-design of hardware and software, especially parallelizing and power reducing compiler, is very important. This lecture will talk about the following topics: the importance of the co-design, automatic parallelization of loops and hierarchical coarse grain tasks for practical programs including automobile engine control, multimedia, medical and scientific applications, automatic power reduction using frequency and voltage control, clock and power gating, homogeneous and heterogeneous multicore architectures, advanced cache and local memory management including data locality optimization, hardware and software coherence controls and software block replacement control heterogeneous task scheduling with overlapping data transfers performance and power consumption of real applications on various multicore systems, such as Intel, ARM, IBM, Fujitsu, Renesas and so on.
 
Lecture Slides