Alberto L. Sangiovanni-Vincentelli is the Edgar L. and Harold H. Buttner Chair at the EECS Department, UC Berkeley. He graduated from the Politecnico di Milano in 1971. He co-founded Cadence and Synopsys, the two leading EDA companies. He is on the Board of Directors of Cadence, KPIT, Expert.ai, Cy4Gate, Exein, and Chairman of the Board of Quantum Motion, Phononic Vibes, Innatera and Phoelex. He is a member of the advisory board of Walden International and Xseed, of the Scientific Advisory Board of the Italian Institute of Technology and the Chair of the Strategic Board and of the International Advisory Board for the Milano Innovation District. He is a member of the Advisory Board of the Politecnico di Milano and honorary Professor at Politecnico di Torino. He was the President of the “Comitato Nazionale dei Garanti della Ricerca” and of the Strategy Committee of Fondo Strategico Italiano. He consulted for companies such as Intel, HP, Bell Labs, IBM, Lendlease, Samsung, UTC, Lutron, Kawasaki Steel, Fujitsu, Telecom Italia, Pirelli, GM, BMW, Mercedes, Magneti Marelli, and ST Microelectronics. He authored 19 books, 2 patents and over 1,000 papers. He is Fellow of the IEEE and ACM, and a member of the National Academy of Engineering. He is the recipient of several academic honors, and research awards including the IEEE/RSE Wolfson James Clerk Maxwell Medal “for groundbreaking contributions that have had an exceptional impact on the development of electronics and electrical engineering or related fields” and the BBVA Frontiers of Knowledge Award in the Information and Communication Technologies category with the following motivation: “for transforming chip design from a handcrafted process to the automated industry that power today’s electronic devices”. Alberto holds four Honorary Doctorates from University of Aalborg, KTH, AGH and University of Rome, Tor Vergata.

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Edoardo Charbon (SM’00 F’17) received the Diploma from ETH Zurich, the M.S. from the University of California at San Diego, and the Ph.D. from the University of California at Berkeley in 1988, 1991, and 1995, respectively, all in electrical engineering and EECS. He has consulted with numerous organizations, including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He was with Cadence Design Systems from 1995 to 2000, where he was the Architect of the company’s initiative on information hiding for intellectual property protection. In 2000, he joined Canesta Inc., as the Chief Architect, where he led the development of wireless 3-D CMOS image sensors. Since 2002 he has been a member of the faculty of EPFL, where he is full professor. From 2008 to 2016 he was with Delft University of Technology’s as full professor and Chair of VLSI design. He has been the driving force behind the creation of deep-submicron CMOS SPAD technology, which is mass-produced since 2015 and is present in telemeters, proximity sensors, and medical diagnostics tools. Since 2014, he has pioneered the use of Cryo-CMOS technology for the control of quantum devices, especially qubits, to achieve scalable, fault-tolerant quantum computing. His interests span from 3-D vision, LiDAR, FLIM, FCS, NIROT to super-resolution microscopy, time-resolved Raman spectroscopy, and cryo-CMOS circuits and systems for quantum computing. He has authored or co-authored over 500 papers and two books, and he holds 30 patents. Dr. Charbon is the recipient of the 2023 IISS Pioneering Achievement Award, he is a distinguished visiting scholar of the W. M. Keck Institute for Space at Caltech, a fellow of the Kavli Institute of Nanoscience Delft, a distinguished lecturer of the IEEE Photonics Society, and a fellow of the IEEE.

The core of a quantum computer or a quantum sensor is generally an array of qubits or quantum detectors and classical electronics for its control; it operates on the qubits/detectors with nanosecond latency and a very low noise. Classical electronics is generally operating at room temperature, however recently, we have proposed that it moves closer to the qubits/detectors and operates at cryogenic temperatures to improve compactness and reliability. This has introduced new constraints to the electronics, especially in terms of noise and power dissipation, due to the extremely weak signals generated by quantum devices that require highly sensitive circuits and systems, along with very precise timing capability. We advocate the use of CMOS technologies to achieve these goals, whereas the circuits will be operated at 2-10K. We believe that these, collectively known as cryo-CMOS circuits, will make future qubit arrays scalable, enabling a faster growth in qubit count. Quantum sensing will become more reliable and robust to the conditions of operation. In the talk, the challenges of designing and operating complex circuits and systems at deep-cryogenic temperatures will be outlined, along with preliminary results achieved in the control of quantum devices by ad hoc integrated circuits that were optimized to operate at low power in these conditions. The talk will conclude with a perspective on the field and its trends.

Nikil Dutt is a Distinguished Professor of CS, Cognitive Sciences, and EECS at the University of California, Irvine. He received a PhD from the University of Illinois at Urbana-Champaign (1989). His research interests are in embedded systems, EDA, computer architecture and compilers, distributed systems, healthcare IoT, and brain-inspired architectures and computing. He has received numerous best paper awards and is coauthor of 7 books. Professor Dutt has served as EiC of ACM TODAES, and AE for ACM TECS and IEEE TVLSI. He is on the steering, organizing, and program committees of several premier EDA and Embedded System Design conferences and workshops, and has also been on the advisory boards of ACM SIGBED, ACM SIGDA, ACM TECS and IEEE ESL. He is an ACM Fellow, IEEE Fellow, and recipient of the IFIP Silver Core Award.

The principle of layered design abstractions has facilitated the development of myriad CyberPhysical Human System (CPHS) applications, ranging from small form-factor IoT devices to complex system-of-systems with humans-in-the-loop. While this clean separation of abstraction levels eases the task of modeling, design, validation and verification, these systems demand a tight coupling of computation, communication and control across the abstraction stack to meet energy, performance, reliability and security needs. Furthermore, the fast-evolving landscape of emerging computing substrates, coupled with highly dynamic operational behaviors operating in varying environmental conditions poses significant challenges to meet the (often conflicting) goals of resiliency, energy, heat, cost, performance, security, etc. I posit that effective deployment of intelligence across the abstraction stack necessarily requires a cross-layer approach, coupled with computational cognitive intelligence (CCI) principles that enable the system to learn and evolve at runtime. A key feature of the CCI paradigm is computational self-awareness through introspection (i.e., modeling and observing its own internal and external behaviors) combined with both reflexive and reflective adaptations via cross-layer physical and virtual sensing and actuations applied across multiple layers of the system abstraction stack. This requires a fundamental change from classical layered computing to a cross-layer CCI paradigm that embodies self-awareness principles. In the past decade we have applied these concepts across multiple CPHS projects spanning nanoscale computing, healthcare IoT, data center memory, and end-to-end computational pipelines for autonomous systems. The rise of generative AI, coupled with distributed autonomy poses new challenges for detecting and managing emergent behaviors to ensure system safety. I will close with some thoughts on how CCI principles and cross-layer self-awareness might be applied to address these challenges.

Elif Bilge Kavun holds the assistant professorship in Secure Intelligent Systems at the Faculty of Computer Science and Mathematics, University of Passau since October 2020. Previously, she was a Lecturer in Cybersecurity at The University of Sheffield (UK) and Digital Design Engineer for Crypto Cores at the Digital Security Solutions division, Infineon (Munich). She completed a PhD in Embedded Security in 2015 at the Faculty of Electrical Engineering and Information Technology, Ruhr University Bochum. Her research interests cover security of novel intelligent systems as well as traditional computing and embedded systems. She is also interested in secure hardware systems, design and implementation of cryptographic primitives, lightweight cryptography, and physical attacks & countermeasures.

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